Maxcell_M100_V02_S_160606_MIRA.zip

-------------------------------------------
Content Of File:
Maxcell_M100_V02_S_160606_MIRA\Firmware\BPLGUInfoCustomAppSrcP_MT6261_S00_F118_T129_MAX_M100_V02_S_160606
Maxcell_M100_V02_S_160606_MIRA\Firmware\DbgInfo_T129_MAX_M100_V02_S_160606_RDR61M_F118_F118_T129_Max_m100_V02_S_160606_2016_06_06_19_38
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\ALICE
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\ALICE.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\backup\ROM.orig
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\backup\VIVA.orig
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\BOOT_ZIMAGE_ER
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\BOOT_ZIMAGE_ER.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_BESLOUDNESS
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_BESLOUDNESS.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_CALCULATOR
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_CALCULATOR.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_CALENDAR
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_CALENDAR.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_CALLSETTING
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_CALLSETTING.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_CAMIMGV
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_CAMIMGV.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_CODE.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_DAF
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_DAF.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_DTCNT
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_DTCNT.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_EM
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_EM.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_FM
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_FM.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_MATV
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_MATV.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_MAUIINIT
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_MAUIINIT.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_MP4DEC
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_MP4DEC.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_PROFILE
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_PROFILE.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_SCRLOCK
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_SCRLOCK.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_SETTINGS
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_SETTINGS.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_SNDREC
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_SNDREC.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_VDOPLY
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_VDOPLY.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_VDOREC
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_VDOREC.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_VEDEC
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_VEDEC.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_VEENC
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_VEENC.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_WAVETABLE
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_BIN\DYNAMIC_COMP_WAVETABLE.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\DYNAMIC_COMP_CODE
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\EXT_BOOTLOADER
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\MIKI61M_GB_11C_BB.cfg
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\RDR61M_F118_BOOTLOADER_V005_MT6261_F118_T129_MAX_M100_V02_S_160606.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\ROM
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\VIVA
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\VIVA.bin
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\ZIMAGE_ER
Maxcell_M100_V02_S_160606_MIRA\Firmware\RDR61M_F118_PCB01_gprs_MT6261_S00.F118_T129_MAX_M100_V02_S_160606.bin\ZIMAGE_ER.bin
-------------------------------------------
Total file size is 17 MB and has compressed to 15 MB to save bandwidth for download 
-------------------------------------------